Pearson Edexcel 1CP2 GCSE Computer Science · Topic 3: Computers

Stretch tasks Hardware and the Processor

Task 1

Quiz Challenge

A quiz game against four computer players, then short and long written answers.

  1. Quiz Blitz12 questions against the clock
  2. Quick Fire4 short answers
  3. Big Think2 long answers

About 20 minutes

Task 2

This or That

Pixel the cat asks 8 questions. Each has two answers: pick the right one.

  • Two answers to every question
  • A fish treat for every right answer
  • Streaks win Pixel shades, then a party hat

About 4 minutes

Task 3

Memory Match

Flip the cards two at a time to match each term card to its meaning card.

  • 12 cards: each term has a meaning
  • One peek at every card
  • Combo points for pairs found in a row

6 pairs, about 4 minutes

Task 4

Sort It

Sort each statement into the right box, like the tick-box tables in the exam.

  • 10 cards to sort into 3 boxes
  • Drag a card, tap a box or press its number
  • Combo points for cards sorted in a row

10 cards, about 4 minutes

The games need JavaScript. Every question is below, with the answers at the end.

Read the lesson: Hardware and the Processor

Hardware and the Processor: the questions

Quiz Challenge, round 1: Quiz Blitz

  1. What is the stored program concept?

    • Programs are wired into the machine
    • Data is stored in the cloud
    • Programs are stored only on disc
    • Instructions and data are held in the same memory
  2. What does the program counter hold?

    • The number of programs running
    • The address of the next instruction
    • The result of the last calculation
    • The data being moved to memory
  3. Which register holds the address currently being accessed?

  4. Which register holds the result of the most recent calculation?

    • Accumulator
    • Program counter
    • Memory address register
    • Memory data register
  5. Which component decodes instructions and coordinates the rest of the CPU?

    • Accumulator
    • Control unit
    • Arithmetic logic unit
    • Cache
  6. The program counter is incremented during the fetch stage.

    • True
    • False
  7. A 3 GHz processor produces how many clock pulses each second?

    • 3 thousand
    • 3
    • 3 billion
    • 3 million
  8. Why does a quad core processor rarely give four times the performance?

    • Some tasks are sequential, and much software cannot split its work
    • Only one core can be switched on
    • Cores share one clock pulse
    • Four cores overheat instantly
  9. Cache makes the clock run faster.

    • True
    • False
  10. What is the von Neumann bottleneck?

    • Running out of RAM
    • Instructions and data compete for one route to memory
    • A CPU with too many cores
    • A slow hard disk
  11. Which TWO are embedded systems?

    Tick 2.

    • A laptop
    • A web server
    • A washing machine controller
    • A traffic light controller
    • A desktop PC
  12. During the fetch, which register does the instruction arrive in?

    • The control unit
    • The memory data register
    • The program counter
    • The accumulator

Quiz Challenge, round 2: Quick Fire

  1. Explain the difference between the MAR and the MDR. [2 marks]

  2. Explain why a higher clock speed improves performance, and why clock speeds stopped climbing. [2 marks]

  3. Explain how cache improves the performance of a CPU. [2 marks]

  4. Explain why an embedded system can use a modest processor and very little memory. [2 marks]

Quiz Challenge, round 3: Big Think

  1. Describe the fetch decode execute cycle for an instruction that adds a number to the accumulator, naming the registers involved. [6 marks]

  2. A games company is choosing between a processor with a higher clock speed and one with more cores and a larger cache. Evaluate how each feature affects performance. [6 marks]

This or That: tick the right answer

  1. Which register holds an address: the MAR or the MDR?

    • MAR
    • MDR
  2. Which component does the calculations and comparisons?

    • The control unit
    • The ALU
  3. Before the stored program concept, how did a computer change its job?

    • It was rewired
    • It downloaded an app
  4. Does cache increase the clock speed?

    • No: it cuts waiting
    • Yes: it speeds the clock up
  5. Which is an embedded system?

    • A pacemaker
    • A laptop
  6. When is the program counter incremented?

    • At the end of execute
    • During fetch
  7. A jump instruction changes which register?

    • The program counter
    • The accumulator
  8. Where are instructions and data held in a von Neumann computer?

    • In separate memories
    • In the same memory

Memory Match: match each term to its meaning

TermMeaning
A Program counter1 Fast store for frequently used data
B MAR2 Address of the next instruction
C MDR3 Result of the last calculation
D Accumulator4 Decodes and coordinates
E Control unit5 Address being accessed now
F Cache6 Data moving to or from memory

Sort It: tick one box in each row

Which stage of the cycle is each step in?

StatementFetchDecodeExecute
The ALU adds two numbers
The PC is incremented
The instruction arrives in the MDR
The ALU compares two values
The result is stored in the accumulator
A jump writes a new address into the PC
The address in the PC is copied into the MAR
The control unit works out what data the instruction needs
The control unit works out what the instruction means
The address goes out on the address bus
Answers

Round 1: Quiz Blitz

  1. Instructions and data are held in the same memory It is why one laptop can be a browser and a game with no physical change.
  2. The address of the next instruction It is incremented during every fetch.
  3. MAR MAR holds an address. MDR holds data.
  4. Accumulator The ALU puts its result in the accumulator.
  5. Control unit It sends the control signals that coordinate everything else.
  6. True Straight after its address is copied into the MAR.
  7. 3 billion Giga means billion.
  8. Some tasks are sequential, and much software cannot split its work A step that needs the last step's result cannot run in parallel.
  9. False It reduces the time spent waiting for RAM.
  10. Instructions and data compete for one route to memory The processor spends part of its time waiting.
  11. A washing machine controller; A traffic light controller An embedded system does one dedicated task inside a larger device.
  12. The memory data register It comes back along the data bus into the MDR.

Round 2: Quick Fire

    • The MAR holds the address being accessed
    • The MDR holds the data or instruction being moved
    Model answer

    The MAR holds the address of the memory location currently being accessed. The MDR holds the data or instruction being moved to or from that location.

    • More pulses per second means more instructions completed each second
    • Heat and power rise faster than speed
    Model answer

    Each clock pulse completes one stage of the cycle, so more pulses per second means more instructions completed each second. But heat and power consumption rise faster than speed, which is why clock speeds stopped climbing.

    • It holds frequently used data and instructions close to the processor
    • They are reached faster than RAM, so the CPU waits less
    Model answer

    Cache holds recently and frequently used data and instructions close to the processor. They can be reached far faster than from RAM, so the CPU spends less time waiting and completes more instructions each second.

    • It does one dedicated task that never changes
    • So it can be cheap, reliable and power efficient
    Model answer

    An embedded system carries out one dedicated task that never changes, such as controlling a washing machine, so it needs no more power than that task demands. This makes it cheap, reliable and power efficient.

Round 3: Big Think

    • The address in the PC is copied into the MAR
    • The PC is incremented
    • The address is sent along the address bus
    • The instruction returns along the data bus into the MDR
    • The control unit works out what the instruction means
    • The ALU carries out the addition
    • The result is stored in the accumulator
    • The cycle repeats for the next instruction
    Model answer

    Fetch: the address in the program counter is copied into the MAR, and the PC is incremented. The address is sent along the address bus, and the instruction returns along the data bus into the MDR. Decode: the control unit works out what the instruction means and what it applies to. Execute: the ALU adds the number to the value in the accumulator, and the result is stored in the accumulator. The cycle then repeats for the next instruction.

    • A higher clock speed completes more instructions per second
    • But it brings more heat and power use
    • More cores execute instructions simultaneously
    • But only if the software splits its work
    • Cache holds frequently used data close to the processor
    • So the processor waits for RAM less often
    • Applied to a game engine, such as physics on separate threads
    • A justified conclusion
    Model answer

    A higher clock speed means more pulses per second, so more instructions are completed every second, but it produces more heat and uses more power, which limits how far it can rise. More cores let several instructions execute simultaneously, which helps a game engine that runs physics, sound and graphics on separate threads, but only if the software is written to split its work; sequential tasks gain nothing. A larger cache holds more frequently used data and instructions close to the processor, so it waits for RAM less often. Overall, for a modern game written to use several threads, more cores and a larger cache are likely to give the bigger gain, so I would choose that processor.

This or That

  1. MAR The names tell you: memory address register, memory data register.
  2. The ALU The control unit decodes and coordinates. The ALU calculates.
  3. It was rewired Holding the program in memory removed the need for rewiring.
  4. No: it cuts waiting Cache reduces the time spent waiting for RAM, so more instructions finish each second.
  5. A pacemaker A pacemaker does one dedicated task. A laptop is general purpose.
  6. During fetch It is incremented as soon as its address has been copied to the MAR.
  7. The program counter A jump writes a new address into the PC, so a different instruction is fetched next.
  8. In the same memory Sharing one memory is the stored program concept, and the cause of the bottleneck.

Memory Match

  • A 2 Program counter: Address of the next instruction
  • B 5 MAR: Address being accessed now
  • C 6 MDR: Data moving to or from memory
  • D 3 Accumulator: Result of the last calculation
  • E 4 Control unit: Decodes and coordinates
  • F 1 Cache: Fast store for frequently used data

Sort It

  1. Execute The ALU adds two numbers Carrying out the instruction is executing.
  2. Fetch The PC is incremented It happens during the fetch, not at the end.
  3. Fetch The instruction arrives in the MDR It returns along the data bus during the fetch.
  4. Execute The ALU compares two values Comparisons happen during execute.
  5. Execute The result is stored in the accumulator The result of the execute stage.
  6. Execute A jump writes a new address into the PC A jump is executed.
  7. Fetch The address in the PC is copied into the MAR The first step of the fetch.
  8. Decode The control unit works out what data the instruction needs Working out what it applies to is part of decoding.
  9. Decode The control unit works out what the instruction means That is decoding.
  10. Fetch The address goes out on the address bus Fetching the instruction from memory.