MskProdComputing
Back to the topic

The mark scheme starts on a new page, so you can print pages one and two for a student and keep the last page yourself. Everything prints in black on white whichever theme you are using.

AQA GCSE CS · 3.4.4

Systems Architecture

Section A: 10 multiple choice questions, 10 marks. Section B: 5 written questions, 15 marks. Total 25 marks.

Name

Class

Date

Mark  / 25

Section A

Circle the letter of the correct answer. One mark each.

  1. 1Which register holds the address of the next instruction to be fetched?1
    1. AMAR
    2. BProgram Counter
    3. CAccumulator
    4. DMDR
  2. 2What does the MDR hold?1
    1. AData or an instruction just fetched from memory
    2. BThe address being accessed
    3. CThe result of a calculation
    4. DThe next instruction's address
  3. 3At what point in the cycle is the Program Counter incremented?1
    1. AOnly when a jump instruction runs
    2. BDuring the fetch stage
    3. COnce per program
    4. DAt the very end of the execute stage
  4. 4What is the defining feature of the von Neumann architecture?1
    1. APrograms are stored on a hard drive
    2. BThere are exactly four registers
    3. CInstructions and data are stored in the same memory
    4. DIt uses more than one core
  5. 5Why does doubling the number of cores rarely double performance?1
    1. ACache is disabled when using multiple cores
    2. BThe extra cores run at half speed
    3. CCores always share one clock pulse
    4. DSome tasks are sequential and not all software can split work across cores
  6. 6How does increasing cache size improve performance?1
    1. AIt increases the clock speed
    2. BIt reduces the number of instructions in the program
    3. CMore of the data and instructions the CPU needs are already close by, so it waits less
    4. DIt adds extra cores
  7. 7What is an embedded system?1
    1. AA computer built into a larger device to carry out one dedicated task
    2. BA computer that cannot be connected to a network
    3. CAny computer smaller than a laptop
    4. DA computer with no operating system at all
  8. 8What travels along the address bus?1
    1. AControl signals from the control unit
    2. BThe instruction being fetched
    3. CThe location in memory being read from or written to
    4. DThe result of a calculation
  9. 9Where is the result of a calculation placed after the ALU performs it?1
    1. AThe MAR
    2. BThe Program Counter
    3. CCache
    4. DThe accumulator
  10. 10Why is the von Neumann bottleneck a limitation?1
    1. AInstructions and data share one bus, so they compete for it and the CPU waits
    2. BMemory can only be written, not read
    3. CRegisters can hold only one value
    4. DOnly one program can be stored at a time

Section B

Answer in the space provided. The number of marks tells you how many separate points to make.

  1. 1StateState the purpose of the Program Counter.1
  2. 2DescribeDescribe the fetch stage of the fetch execute cycle.4
  3. 3ExplainExplain two factors that affect the performance of a CPU.4
  4. 4ExplainA manufacturer replaces a dual core processor with a quad core processor of the same clock speed. Explain why the computer may not be twice as fast.3
  5. 5ExplainExplain why an embedded system can use a less powerful processor than a general purpose computer.3

Mark scheme

Section A

1B2A3B4C5D6C7A8C9D10A

Section B

1 State the purpose of the Program Counter. 1

One mark for each of the following, to a maximum of 1.

  • It holds the address of the next instruction to be fetched

Model answer. The Program Counter holds the memory address of the next instruction to be fetched from memory.

2 Describe the fetch stage of the fetch execute cycle. 4

One mark for each of the following, to a maximum of 4.

  • The address in the Program Counter is copied into the MAR
  • The Program Counter is incremented
  • The address travels out on the address bus to main memory
  • The instruction returns on the data bus into the MDR

Model answer. The address held in the Program Counter is copied into the Memory Address Register. The Program Counter is then incremented, so that it already holds the address of the following instruction. The address in the MAR travels out along the address bus to main memory, and the instruction stored at that address is returned along the data bus into the Memory Data Register, from where it is passed to the control unit to be decoded.

3 Explain two factors that affect the performance of a CPU. 4

One mark for each of the following, to a maximum of 4.

  • Clock speed determines how many instruction stages happen per second
  • A higher clock speed means more instructions completed in the same time
  • Cache size affects how often the CPU has to wait for main memory
  • More cache means less waiting, so more instructions are completed per second

Model answer. The first factor is clock speed, which is the number of pulses the clock generates each second. One stage of the fetch execute cycle happens per pulse, so a processor running at 3 GHz gets through three billion stages a second and a faster clock means more instructions completed in the same time. The second is cache size. Cache is small, very fast memory close to the processor holding recently and frequently used data and instructions, and fetching from it takes a fraction of the time of fetching from RAM. A larger cache means more of what the processor needs is already close by, so it spends less time waiting for main memory and completes more instructions per second. Note that cache does not change the clock speed: it reduces idle time.

4 A manufacturer replaces a dual core processor with a quad core processor of the same clock speed. Explain why the computer may not be twice as fast. 3

One mark for each of the following, to a maximum of 3.

  • Not all software is written to divide work across multiple cores
  • Some tasks are sequential, so each step needs the result of the previous one
  • So the additional cores may be idle for part of the time

Model answer. Adding cores only helps when there is work that can genuinely run at the same time. A great deal of software is written to run as a single sequence of instructions and simply will not use more than one core, so the extra cores sit idle while it runs. Even in software that is written for multiple cores, some tasks are inherently sequential, because each step needs the result of the one before it and cannot start until that result exists. Doubling the number of cores therefore doubles the theoretical maximum but rarely doubles the performance actually seen.

5 Explain why an embedded system can use a less powerful processor than a general purpose computer. 3

One mark for each of the following, to a maximum of 3.

  • It is designed to carry out one specific dedicated task
  • It does not need to run a range of different software or a full operating system
  • So it needs less processing power and memory, which makes it cheaper and more power efficient

Model answer. An embedded system exists to perform one fixed task within a larger device, such as running the wash cycle in a washing machine. Because that task never changes, the system does not have to run arbitrary software, does not need a full general purpose operating system and does not need to handle whatever a user might install next. The single program it runs can be written to fit the hardware exactly, so a modest processor and a very small amount of memory are sufficient. That makes the device cheaper to manufacture, more reliable because there is far less that can go wrong, and much more power efficient, which matters when the controller must run continuously.