KS48525 3.4.4 32 min read 10 question quiz 15 exam marks

Systems Architecture

The von Neumann architecture, every register named in the specification, the fetch execute cycle in full, the three factors affecting CPU performance and what an embedded system actually is.

The von Neumann architecture

Almost every computer follows the von Neumann architecture, whose defining feature is the stored program concept: instructions and data are held in the same memory, and instructions are fetched from that memory one at a time and executed.

Before this, changing what a machine did meant physically rewiring it. The stored program concept is why one laptop can be a word processor, a games console and a compiler without any physical change at all.

The consequence is the von Neumann bottleneck: because instructions and data share one bus to memory, they compete for it, and the processor can spend a substantial part of its time waiting.

The fetch decode execute cycle inside the processorThe processor on the left, with main memory on the right, joined by three buses. Inside the processor are the program counter, the memory address register, the memory data register, the current instruction register, the control unit and the arithmetic logic unit. The cycle runs like this. The program counter holds the address of the next instruction, here 0x04A. That address is copied into the memory address register and sent to memory along the address bus, which is one way. Memory sends the contents of that address, here the instruction LDA 7, back along the data bus into the memory data register, and it is copied to the current instruction register. The control unit decodes the instruction and works out what has to happen, sending signals along the control bus when memory is involved. The arithmetic logic unit carries it out, and the program counter moves on by one.CENTRAL PROCESSING UNITPCprogram counter0x04AMARmemory address0x04ACIRcurrent instructionLDA 7MDRmemory dataLDA 7CUcontrol unitdecodesALUarithmetic logic unitadds, compares, ANDsaddress busdata buscontrol busMain memory (RAM)0x049ADD 30x04ALDA 70x04BSTA 90x04CJMP 2a real memory module12345
  1. The program counter holds the address of the next instruction.
  2. That address goes to memory along the address bus.
  3. The instruction comes back along the data bus and lands in the MDR.
  4. The control unit decodes it and works out what has to happen.
  5. The ALU executes it, and the program counter moves on by one.
Address out, data back, control alongside. The address bus is one way: memory never sends an address to the CPU.
A processor, from above and from belowA processor chip lying face up out of its socket, with the heat spreader on top and hundreds of gold contact pads covering the underside.topunderneaththe metal lid is a heat spreaderthe silicon is a few millimetres wide, beneath ithundreds of gold contact padsthey press onto the socket's pinspin 1 marker
The metal lid is a heat spreader, not the processor. The silicon doing the work is a square a few millimetres across underneath it.Drawn illustration

Registers and the fetch execute cycle

A register is a very small, extremely fast storage location inside the CPU holding one value. AQA names four.

RegisterFull nameHolds
PCProgram CounterThe address of the next instruction to be fetched
MARMemory Address RegisterThe address currently being read from or written to
MDRMemory Data RegisterThe data or instruction just fetched, or about to be written
ACCAccumulatorThe result of the most recent calculation
MAR holds an address, MDR holds data

The names say so. Swapping them is one of the most commonly penalised errors on this topic, and it is entirely avoidable.

The fetch execute cycle

Fetch

  1. The address in the PC is copied into the MAR.
  2. The PC is incremented, so it already points at the next instruction.
  3. The address in the MAR travels out along the address bus, and the instruction at that address comes back along the data bus into the MDR.

Decode

  1. The instruction in the MDR is decoded by the control unit, which works out what operation is required and what data it applies to.

Execute

  1. The instruction is carried out. If it is a calculation the ALU performs it and the result goes into the accumulator. If it is a jump, a new address is written into the PC.

Then the cycle repeats, billions of times a second.

The PC is incremented during fetch

Not at the end of the cycle. If it waited, a jump instruction executed later would have its new address immediately overwritten.

The fetch decode execute cycleA seven stage walk through the fetch decode execute cycle. In fetch, the address in the program counter is copied into the memory address register, the program counter is incremented, the address travels out on the address bus to main memory, and the instruction returns on the data bus into the memory data register and then the current instruction register. In decode, the control unit splits that instruction into an opcode saying which operation to perform and an operand giving the data or its address. In execute, the instruction is carried out and any result from the arithmetic logic unit is placed in the accumulator with the status flags updated. Control then returns to fetch and the whole cycle repeats, around three billion times a second on a 3 gigahertz processor.CENTRAL PROCESSING UNITPCMARMDRCIRControl Unit + ALUMAIN MEMORY0x04A ADD 120x04B STA 20address busdata busPC → MARPC = PC + 1address out on the address businstruction back on the data bus → MDR → CIRopcode + operandcarry it out, update the flagsrepeat
Step through the cycle. Naming the registers and buses in this order is what turns a one mark answer into a full mark one.

CPU performance and embedded systems

Three factors affect how much work a processor gets done, and questions almost always ask you to compare two of them.

Clock speed

The clock generates pulses, and one instruction stage happens per pulse. A 3 GHz processor produces three billion pulses a second. Doubling the clock speed roughly doubles the instructions completed per second, but power consumption and heat rise faster than the speed does, which is why clock speeds stopped climbing.

Number of cores

A core is a complete processing unit. A quad core processor can genuinely execute four instructions at the same instant.

It rarely gives four times the performance, for two reasons worth stating: not all software is written to split work across cores, and some tasks are inherently sequential because each step needs the result of the last.

Cache size

Cache is small, very fast memory inside or extremely close to the CPU holding recently and frequently used instructions and data. Fetching from cache takes a fraction of the time of fetching from RAM.

More cache means more of what the processor needs is already close by, so it spends less time waiting. Cache is expensive per byte, which is why there is not simply more of it.

The framing that earns marks

Cache does not make the processor faster. It reduces the time the processor spends waiting, so more instructions are completed per second.

Embedded systems

An embedded system is a computer built into a larger device to perform one specific, dedicated task: the controller in a washing machine, a microwave, a traffic light, a pacemaker, a digital camera.

Because the task is fixed, an embedded system can use a much less powerful processor, very little memory and no general purpose operating system. That makes it cheaper, more reliable and far more power efficient than a general purpose computer would be. The trade off is that it cannot be repurposed: a washing machine controller will never run anything else.

Components of the CPU and the three busesThe central processing unit contains a control unit which decodes instructions and coordinates the other components, an arithmetic logic unit which performs calculations and comparisons, a set of registers holding the program counter, memory address register, memory data register, current instruction register and accumulator, and cache holding recently used data and instructions. The CPU connects to main memory and to input and output devices through three buses. The address bus carries addresses one way out of the processor, the data bus carries data and instructions in both directions, and the control bus carries control signals in both directions.CENTRAL PROCESSING UNITControl Unitdecodes and coordinatesArithmetic Logic Unitcalculates and comparesREGISTERSPCMARMDRCIRACCCacheMain memoryRAMInput and outputdevicesAddress busone way, out of the CPUData bustwo wayControl bustwo way
The address bus is one way because addresses only ever travel out of the processor. The data bus is two way because data travels in both.
What decides how fast a processor is: clock speed, cores and cacheThe three things that decide how fast a processor is. Clock speed is how many cycles it runs each second, measured in gigahertz, and 3.6 GHz means three thousand six hundred million cycles a second; each cycle can carry out part of an instruction, so more cycles means more work done, as long as nothing else is holding it up. The number of cores is how many instructions it can genuinely process at the same time, since each core is a complete processor; four cores can work on four jobs at once, but only if the work can be split up. Cache is a small amount of very fast memory on the processor chip, about a nanosecond away, where the processor keeps what it is likely to need next, so it waits for main memory, about a hundred nanoseconds away, less often. A bigger number on one of these is not automatically a faster computer, because the other two, and the software, can hold it back.Clock speedCoresCache3.6 GHz3,600,000,000 cyclesevery secondmore cycles = more done12344 cores4 jobs at the same momentif the work can be splitL1cache: ~1 nsRAM: ~100 nsCachememory on the chip itselfwaits for RAM less often!A bigger number is not automatically a faster computer.Cores that cannot be kept busy, or a slow memory, hold the whole machine back.1234
  1. Clock speed: how many cycles the processor runs each second.
  2. Cores: how many instructions it can genuinely work on at once.
  3. Cache: fast memory on the chip, so it waits for RAM less often.
  4. A bigger number is not automatically a faster computer.
Exam answers that just say ‘higher clock speed is faster’ get one mark. Saying what it does, and what limits it, gets the rest.

Key terms you must be able to define

Von Neumann architecture
A design in which instructions and data share the same memory and instructions are fetched one at a time.
Stored program concept
The idea that a program is held in memory alongside its data rather than being wired into the machine.
Register
A very small, very fast storage location inside the CPU holding a single value.
Program Counter
The register holding the address of the next instruction to be fetched.
Memory Address Register
The register holding the address currently being read from or written to.
Memory Data Register
The register holding data or an instruction that has just been fetched or is about to be written.
Accumulator
The register holding the result of the most recent calculation.
Clock speed
The number of clock pulses per second, measured in hertz.
Core
A complete processing unit within a CPU, able to execute instructions independently.
Cache
Small, very fast memory close to the CPU holding recently and frequently used data and instructions.
Embedded system
A computer built into a larger device to carry out one dedicated task.

Flashcards

Say the definition out loud before you flip the card. Retrieving it from memory is what builds recall, reading it again is not.

DefineVon Neumann architecture
AnswerA design in which instructions and data share the same memory and instructions are fetched one at a time.
DefineStored program concept
AnswerThe idea that a program is held in memory alongside its data rather than being wired into the machine.
DefineRegister
AnswerA very small, very fast storage location inside the CPU holding a single value.
DefineProgram Counter
AnswerThe register holding the address of the next instruction to be fetched.
DefineMemory Address Register
AnswerThe register holding the address currently being read from or written to.
DefineMemory Data Register
AnswerThe register holding data or an instruction that has just been fetched or is about to be written.
DefineAccumulator
AnswerThe register holding the result of the most recent calculation.
DefineClock speed
AnswerThe number of clock pulses per second, measured in hertz.

Reach the top grade on this topic

This is the topic where naming things precisely is worth the most.

Use the register names as part of the sentence. "The address held in the Program Counter is copied into the MAR, and the instruction at that address returns along the data bus into the MDR" is a full mark answer. "The CPU gets the instruction from memory" is one mark at best.

Explain performance as work completed, not as speed. Cache reduces waiting. More cores allow genuine parallel execution but only where the software can use it. Clock speed raises the rate of stages but costs heat.

Qualify the multi core claim. A grade 9 answer says four cores do not give four times the performance because some tasks are sequential and not all software is written to use them.

Mistakes that cost marks here

Avoid these
  • Swapping MAR and MDR. The Address Register holds an address, the Data Register holds data.
  • Saying the Program Counter is incremented at the end of the cycle. It is incremented during fetch.
  • Writing that cache makes the CPU faster. It reduces the time the CPU spends waiting.
  • Claiming a quad core processor is always four times faster. It depends entirely on the software and the task.
  • Describing an embedded system as simply a small computer. It is dedicated to one task, which is the point.
Fun fact

The clock speed of desktop processors stopped climbing around 2005, not because engineers ran out of ideas but because the heat produced rises faster than the speed does. Adding cores was the way round the wall.

Knowledge check

0 of 10 answered
1Which register holds the address of the next instruction to be fetched?
2What does the MDR hold?
3At what point in the cycle is the Program Counter incremented?
4What is the defining feature of the von Neumann architecture?
5Why does doubling the number of cores rarely double performance?
6How does increasing cache size improve performance?
7What is an embedded system?
8What travels along the address bus?
9Where is the result of a calculation placed after the ALU performs it?
10Why is the von Neumann bottleneck a limitation?
Score 0 / 10

Exam-style questions

Five written questions in the style of the real paper. Write a full answer, then let the marker check it against the mark scheme.

15 marks
1State the purpose of the Program Counter.1 mark
State

Mark scheme0 / 1
  • LIt holds the address of the next instruction to be fetched
Model answer

The Program Counter holds the memory address of the next instruction to be fetched from memory.

The marker looks for key phrases. If you said it another way and it is still right, give yourself the mark.
2Describe the fetch stage of the fetch execute cycle.4 marks
Describe

Mark scheme0 / 4
  • LThe address in the Program Counter is copied into the MAR
  • LThe Program Counter is incremented
  • LThe address travels out on the address bus to main memory
  • LThe instruction returns on the data bus into the MDR
Model answer

The address held in the Program Counter is copied into the Memory Address Register. The Program Counter is then incremented, so that it already holds the address of the following instruction. The address in the MAR travels out along the address bus to main memory, and the instruction stored at that address is returned along the data bus into the Memory Data Register, from where it is passed to the control unit to be decoded.

The marker looks for key phrases. If you said it another way and it is still right, give yourself the mark.
3Explain two factors that affect the performance of a CPU.4 marks
Explain

Mark scheme0 / 4
  • LClock speed determines how many instruction stages happen per second
  • LA higher clock speed means more instructions completed in the same time
  • LCache size affects how often the CPU has to wait for main memory
  • LMore cache means less waiting, so more instructions are completed per second
Model answer

The first factor is clock speed, which is the number of pulses the clock generates each second. One stage of the fetch execute cycle happens per pulse, so a processor running at 3 GHz gets through three billion stages a second and a faster clock means more instructions completed in the same time. The second is cache size. Cache is small, very fast memory close to the processor holding recently and frequently used data and instructions, and fetching from it takes a fraction of the time of fetching from RAM. A larger cache means more of what the processor needs is already close by, so it spends less time waiting for main memory and completes more instructions per second. Note that cache does not change the clock speed: it reduces idle time.

The marker looks for key phrases. If you said it another way and it is still right, give yourself the mark.
4A manufacturer replaces a dual core processor with a quad core processor of the same clock speed. Explain why the computer may not be twice as fast.3 marks
Explain

Mark scheme0 / 3
  • LNot all software is written to divide work across multiple cores
  • LSome tasks are sequential, so each step needs the result of the previous one
  • LSo the additional cores may be idle for part of the time
Model answer

Adding cores only helps when there is work that can genuinely run at the same time. A great deal of software is written to run as a single sequence of instructions and simply will not use more than one core, so the extra cores sit idle while it runs. Even in software that is written for multiple cores, some tasks are inherently sequential, because each step needs the result of the one before it and cannot start until that result exists. Doubling the number of cores therefore doubles the theoretical maximum but rarely doubles the performance actually seen.

The marker looks for key phrases. If you said it another way and it is still right, give yourself the mark.
5Explain why an embedded system can use a less powerful processor than a general purpose computer.3 marks
Explain

Mark scheme0 / 3
  • LIt is designed to carry out one specific dedicated task
  • LIt does not need to run a range of different software or a full operating system
  • LSo it needs less processing power and memory, which makes it cheaper and more power efficient
Model answer

An embedded system exists to perform one fixed task within a larger device, such as running the wash cycle in a washing machine. Because that task never changes, the system does not have to run arbitrary software, does not need a full general purpose operating system and does not need to handle whatever a user might install next. The single program it runs can be written to fit the hardware exactly, so a modest processor and a very small amount of memory are sufficient. That makes the device cheaper to manufacture, more reliable because there is far less that can go wrong, and much more power efficient, which matters when the controller must run continuously.

The marker looks for key phrases. If you said it another way and it is still right, give yourself the mark.
Machine mark 0 / 15