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GCSE Computer Science · 1.1.1

Architecture of the CPU

Section A: 10 multiple choice questions, 10 marks. Section B: 5 written questions, 18 marks. Total 28 marks.

Name

Class

Date

Mark  / 28

Section A

Circle the letter of the correct answer. One mark each.

  1. 1Which register holds the address of the next instruction to be fetched?1
    1. AProgram Counter
    2. BMemory Data Register
    3. CMemory Address Register
    4. DAccumulator
  2. 2What is the defining feature of the von Neumann architecture?1
    1. ACache is placed on the processor chip
    2. BData is stored in binary
    3. CInstructions and data are stored in the same memory
    4. DThe CPU has more than one core
  3. 3Which component decodes instructions and sends control signals to the rest of the CPU?1
    1. AControl Unit
    2. BCache
    3. CAccumulator
    4. DArithmetic Logic Unit
  4. 4A cache miss occurs when:1
    1. AThe cache is full and cannot accept new data
    2. BThe data the CPU needs is not in cache, so it must be fetched from RAM
    3. CThe CPU reads the wrong instruction
    4. DTwo cores try to use the cache at once
  5. 5Which bus is unidirectional?1
    1. AThe control bus
    2. BThe data bus
    3. CAll three are bidirectional
    4. DThe address bus
  6. 6Where is the result of an ALU calculation placed?1
    1. AThe Program Counter
    2. BCache
    3. CThe Accumulator
    4. DThe MAR
  7. 7During the fetch stage, when is the Program Counter incremented?1
    1. AOnly when a jump instruction runs
    2. BStraight after its value is copied into the MAR
    3. CIt is never incremented, the Control Unit tracks position
    4. DAfter the instruction has been executed
  8. 8Which of these best explains why L1 cache is smaller than L3 cache?1
    1. AL1 is stored on the hard drive
    2. BL1 only stores instructions, not data
    3. CL1 is never used by modern processors
    4. DVery fast memory placed directly on the core is expensive and takes up physical space
  9. 9What does the MDR hold immediately after the fetch stage?1
    1. AThe result of the last calculation
    2. BThe control signals for the ALU
    3. CThe instruction that has just been retrieved from memory
    4. DThe address of the next instruction
  10. 10A computer executes a jump instruction. Which register is directly changed as a result?1
    1. AThe Accumulator
    2. BThe Control Unit
    3. CThe MDR
    4. DThe Program Counter

Section B

Answer in the space provided. The number of marks tells you how many separate points to make.

  1. 1DescribeDescribe the purpose of the Arithmetic Logic Unit within the CPU.2
  2. 2DescribeDescribe the stages of the fetch decode execute cycle. Refer to the registers involved in your answer.6
  3. 3ExplainExplain how increasing the amount of cache memory in a computer can improve its performance.4
  4. 4ExplainExplain the difference between the Memory Address Register and the Memory Data Register.3
  5. 5ExplainA student says: 'The CPU stores all of a computer's data.' Explain why this statement is incorrect.3

Mark scheme

Section A

1A2C3A4B5D6C7B8D9C10D

Section B

1 Describe the purpose of the Arithmetic Logic Unit within the CPU. 2

One mark for each of the following, to a maximum of 2.

  • Performs arithmetic operations such as addition and subtraction
  • Performs logical operations and comparisons such as AND, OR, NOT or greater than

Model answer. The ALU carries out all arithmetic operations, such as addition and subtraction, and all logical operations, such as comparing two values or applying AND, OR and NOT. Results produced by the ALU are placed in the accumulator.

2 Describe the stages of the fetch decode execute cycle. Refer to the registers involved in your answer. 6

One mark for each of the following, to a maximum of 6.

  • The address of the next instruction is copied from the Program Counter into the MAR
  • The Program Counter is incremented
  • The address is sent to memory along the address bus
  • The instruction is returned along the data bus into the MDR
  • The Control Unit decodes the instruction to determine what operation is required
  • The instruction is executed, for example the ALU performs a calculation and stores the result in the accumulator

Model answer. The address of the next instruction is copied from the Program Counter into the Memory Address Register, and the Program Counter is then incremented so that it points at the following instruction. The address in the MAR is sent to main memory along the address bus, and the instruction stored there is returned along the data bus into the Memory Data Register. The Control Unit then decodes that instruction to determine which operation is required and which data it needs. Finally the instruction is executed: if it is a calculation the ALU performs it and the result is placed in the accumulator, and the cycle then repeats.

3 Explain how increasing the amount of cache memory in a computer can improve its performance. 4

One mark for each of the following, to a maximum of 4.

  • Cache is much faster to access than RAM
  • More cache means more frequently used instructions and data can be stored close to the CPU
  • This increases the cache hit rate, so fewer requests have to go out to RAM
  • The CPU therefore spends less time waiting and can execute more instructions per second

Model answer. Cache is a small amount of memory that is much faster to access than RAM because it sits inside or very close to the CPU. Increasing the amount of cache means more of the instructions and data the CPU uses frequently can be held there, which raises the proportion of requests that are cache hits. Because fewer requests have to travel out to the slower RAM, the CPU spends less time idle waiting for data, so it completes more instructions per second and the computer performs better.

4 Explain the difference between the Memory Address Register and the Memory Data Register. 3

One mark for each of the following, to a maximum of 3.

  • The MAR holds a memory address
  • The MDR holds the actual data or instruction
  • The MAR identifies where in memory to read from or write to, and the MDR carries what is read or written

Model answer. The Memory Address Register holds the address of the memory location that is currently being read from or written to, so it identifies where in memory the CPU is working. The Memory Data Register holds the actual data or instruction that has just been fetched from that location, or that is about to be written to it. In short, the MAR says where and the MDR says what.

5 A student says: 'The CPU stores all of a computer's data.' Explain why this statement is incorrect. 3

One mark for each of the following, to a maximum of 3.

  • The CPU processes data rather than storing it long term
  • Registers and cache inside the CPU hold data only temporarily while it is being worked on
  • Data is stored in RAM while in use and in secondary storage such as an SSD or hard disk when not in use

Model answer. The statement is incorrect because the role of the CPU is to process data and instructions, not to store them. The registers and cache inside the CPU do hold values, but only temporarily while those values are actively being fetched, decoded or executed, and their contents are lost when power is removed. Data that is currently in use is stored in RAM, and data that must be kept when the computer is switched off is stored in secondary storage such as an SSD or a hard disk drive.