Architecture of the CPU
What the processor is actually for, the job of every component inside it, and the fetch decode execute cycle written the way examiners want to read it.
What the CPU is for
The Central Processing Unit is the part of a computer that carries out instructions. Everything a computer appears to do, loading a page, playing audio, checking a password, is the CPU executing a very long list of extremely simple instructions, very fast.
That last sentence is worth slowing down on. The CPU cannot do anything clever. It can add two numbers, compare two numbers, copy a number from one place to another, and jump to a different instruction. Complex behaviour comes from doing millions of those simple things per second in the right order.
The CPU processes data and instructions, and it does this by continuously fetching, decoding and executing instructions stored in memory.
The von Neumann architecture
Almost every computer you use follows the von Neumann architecture. Its defining feature is the stored program concept: instructions and data are held in the same memory, and instructions are fetched from memory one at a time to be executed.
Before this idea, a machine had to be physically rewired to do a different job. The stored program concept is why a single laptop can be a word processor one minute and a games console the next.
The CPU processes data. Storing is what memory and secondary storage do. Registers hold data only for the split second they are being worked on.
Components of the CPU
You need to know what each part does, and crucially why it exists.
The Arithmetic Logic Unit (ALU)
The ALU carries out all the arithmetic and all the logic operations.
- Arithmetic means addition, subtraction, and the shifts used for multiplication and division.
- Logic means comparisons and Boolean operations: AND, OR, NOT, and tests such as is this value greater than that one.
Every calculation in every program you have ever run happened in an ALU.
The Control Unit (CU)
The Control Unit is the manager. It:
- decodes the instructions fetched from memory,
- sends control signals to the other components telling them what to do and when,
- controls the flow of data around the CPU and between the CPU and memory,
- keeps everything synchronised to the clock.
Cache
Cache is a small amount of very fast memory located inside or extremely close to the CPU. It holds copies of instructions and data that have been used recently or are likely to be needed next.
Why it exists: RAM is slow compared with the CPU. If the CPU had to wait for RAM every single cycle it would sit idle most of the time. Cache is the buffer that keeps the CPU fed.
| Level | Size | Speed | Position |
|---|---|---|---|
| L1 | Smallest, a few KB to a few hundred KB | Fastest | On the CPU core itself |
| L2 | Larger, hundreds of KB to a few MB | Slower than L1 | On the chip, often per core |
| L3 | Largest, several MB or more | Slowest of the three, still far faster than RAM | Shared between all cores |
When the CPU finds what it needs in cache that is a cache hit. When it does not, that is a cache miss and it has to go out to RAM, which is much slower.
More cache means more instructions and data can be held close to the CPU, so there are fewer slow trips out to RAM, so the CPU spends more time working and less time waiting.
Registers
Registers are tiny, extremely fast storage locations inside the CPU. Each holds a single value. They are the fastest storage in the entire computer, faster even than cache, because they are part of the CPU itself.
| Register | Full name | What it holds |
|---|---|---|
| PC | Program Counter | The memory address of the next instruction to be fetched |
| MAR | Memory Address Register | The address currently being read from or written to |
| MDR | Memory Data Register | The data or instruction that has just been fetched, or is about to be written |
| ACC | Accumulator | The result of calculations carried out by the ALU |
This is the single most commonly confused pair at GCSE. MAR is the postcode. MDR is the parcel.
Buses
A bus is a set of parallel wires that carries signals between components.
- Address bus: carries memory addresses from the CPU to memory. It is unidirectional, addresses only travel one way.
- Data bus: carries the actual data and instructions. It is bidirectional, data travels both ways.
- Control bus: carries control signals, such as read, write and clock signals.
- The program counter holds the address of the next instruction.
- That address goes to memory along the address bus.
- The instruction comes back along the data bus and lands in the MDR.
- The control unit decodes it and works out what has to happen.
- The ALU executes it, and the program counter moves on by one.
The fetch decode execute cycle
This is the heartbeat of the computer. It repeats billions of times per second, and it never stops while the machine is on.
Fetch
- The address of the next instruction is copied from the Program Counter into the MAR.
- The Program Counter is incremented so it points at the following instruction.
- The address in the MAR is sent along the address bus to main memory.
- The instruction at that address is sent back along the data bus into the MDR.
Decode
- The instruction in the MDR is passed to the Control Unit, which works out what the instruction means: what operation is required and what data it needs.
Execute
- The instruction is carried out. This might be an ALU calculation with the result placed in the Accumulator, data being written to memory, or a jump that changes the value in the Program Counter.
Then the cycle begins again.
Use the register names, and put them in the right order. A four mark answer that says "it fetches the instruction, decodes it, then executes it" will usually get one mark. An answer that names PC, MAR, MDR, the buses and the CU in sequence gets all four.
A 3 GHz processor completes this cycle around three billion times each second. In the time it takes you to blink, roughly 300 milliseconds, it has run about 900 million cycles.
Step 1 of 7 Fetch: the address in the program counter is copied into the MAR.
Key terms you must be able to define
- CPU
- The component that processes all data and instructions by repeatedly fetching, decoding and executing them.
- Von Neumann architecture
- A design in which instructions and data are stored in the same memory and instructions are fetched one at a time.
- ALU
- Arithmetic Logic Unit. Performs all arithmetic calculations and all logical comparisons.
- Control Unit
- Decodes instructions and sends control signals that coordinate every other component.
- Cache
- Small, very fast memory inside or near the CPU holding recently or frequently used data and instructions.
- Register
- A tiny, extremely fast storage location inside the CPU that holds a single value.
- Program Counter
- The register holding the memory address of the next instruction to be fetched.
- MAR
- Memory Address Register. Holds the address in memory currently being read from or written to.
- MDR
- Memory Data Register. Holds the data or instruction that has just been fetched from, or is about to be written to, memory.
- Accumulator
- The register that stores the result of calculations carried out by the ALU.
- Bus
- A set of parallel wires carrying signals between components. The three buses are address, data and control.
Flashcards
Say the definition out loud before you flip the card. Retrieving it from memory is what builds recall, reading it again is not.
Reach the top grade on this topic
Grade 9 answers on this topic do three things that grade 5 answers do not.
They use register names as verbs, not decoration. Weak answer: "the CPU gets the instruction from memory". Strong answer: "the address held in the Program Counter is copied to the MAR, and the instruction at that address is returned along the data bus into the MDR".
They explain the reason, not just the fact. If a question asks why cache improves performance, the fact is "cache is faster than RAM". The reason is "so the CPU spends fewer cycles waiting for data, which means more instructions completed per second".
They link components together. Top answers show that the components form a system: the CU sends the signal, the ALU does the work, the accumulator holds the result, the PC decides what happens next.
- Be able to write the full fetch decode execute cycle from memory in six numbered steps
- Be able to state what each register holds in one sentence, without hesitating between MAR and MDR
- Be able to explain a cache hit and a cache miss and why the difference matters
- Be able to say why the address bus is unidirectional but the data bus is bidirectional
Mistakes that cost marks here
- Saying the CPU stores data permanently. It does not. Registers hold values only while they are being processed.
- Swapping MAR and MDR. The Address Register holds an address, the Data Register holds data.
- Forgetting that the Program Counter is incremented during the fetch stage, not at the end of the cycle.
- Writing that cache 'makes the CPU faster'. Cache does not change the clock speed. It reduces the time the CPU spends waiting, so more work is completed per second.
- Describing the ALU as doing 'everything'. The ALU does arithmetic and logic. Decoding and coordination are the Control Unit's job.
The 'von Neumann' architecture is named after John von Neumann, but the report that described it in 1945 was a draft with only his name on the cover. The ideas came from a whole team at the University of Pennsylvania, and the argument over credit has never fully died down.
Knowledge check
Exam-style questions
Five written questions in the style of the real paper. Write a full answer, then let the marker check it against the mark scheme.
- LPerforms arithmetic operations such as addition and subtraction
- LPerforms logical operations and comparisons such as AND, OR, NOT or greater than
The ALU carries out all arithmetic operations, such as addition and subtraction, and all logical operations, such as comparing two values or applying AND, OR and NOT. Results produced by the ALU are placed in the accumulator.
- LThe address of the next instruction is copied from the Program Counter into the MAR
- LThe Program Counter is incremented
- LThe address is sent to memory along the address bus
- LThe instruction is returned along the data bus into the MDR
- LThe Control Unit decodes the instruction to determine what operation is required
- LThe instruction is executed, for example the ALU performs a calculation and stores the result in the accumulator
The address of the next instruction is copied from the Program Counter into the Memory Address Register, and the Program Counter is then incremented so that it points at the following instruction. The address in the MAR is sent to main memory along the address bus, and the instruction stored there is returned along the data bus into the Memory Data Register. The Control Unit then decodes that instruction to determine which operation is required and which data it needs. Finally the instruction is executed: if it is a calculation the ALU performs it and the result is placed in the accumulator, and the cycle then repeats.
- LCache is much faster to access than RAM
- LMore cache means more frequently used instructions and data can be stored close to the CPU
- LThis increases the cache hit rate, so fewer requests have to go out to RAM
- LThe CPU therefore spends less time waiting and can execute more instructions per second
Cache is a small amount of memory that is much faster to access than RAM because it sits inside or very close to the CPU. Increasing the amount of cache means more of the instructions and data the CPU uses frequently can be held there, which raises the proportion of requests that are cache hits. Because fewer requests have to travel out to the slower RAM, the CPU spends less time idle waiting for data, so it completes more instructions per second and the computer performs better.
- LThe MAR holds a memory address
- LThe MDR holds the actual data or instruction
- LThe MAR identifies where in memory to read from or write to, and the MDR carries what is read or written
The Memory Address Register holds the address of the memory location that is currently being read from or written to, so it identifies where in memory the CPU is working. The Memory Data Register holds the actual data or instruction that has just been fetched from that location, or that is about to be written to it. In short, the MAR says where and the MDR says what.
- LThe CPU processes data rather than storing it long term
- LRegisters and cache inside the CPU hold data only temporarily while it is being worked on
- LData is stored in RAM while in use and in secondary storage such as an SSD or hard disk when not in use
The statement is incorrect because the role of the CPU is to process data and instructions, not to store them. The registers and cache inside the CPU do hold values, but only temporarily while those values are actively being fetched, decoded or executed, and their contents are lost when power is removed. Data that is currently in use is stored in RAM, and data that must be kept when the computer is switched off is stored in secondary storage such as an SSD or a hard disk drive.